/**
 ******************************************************************************
 * @file    zb32l03x_hal_usart.h
 * @author  MCU Application Team
 * @Version V0.0.1
 * @Date    2022/08/25
 * @brief   Header file of USART HAL module.
 *
 ******************************************************************************
 */



#ifndef __ZB32L03x_HAL_USART_H
#define __ZB32L03x_HAL_USART_H

#include "zb32l03x_hal_def.h"

#ifdef __cplusplus
extern "C" {
#endif


/** @defgroup  USART Write Data to DR Register for Transmit or Receive Data Length Mask definition.
  * @{
  */

#define USART_DR_7BIT                           (0x007fUL)
#define USART_DR_8BIT                           (0x00ffUL)
#define USART_DR_9BIT                           (0x01ffUL)

/**
  * @}
  */


/** @defgroup  USART Register Index Mask definition.
  * @{
  */

#define USART_CR1_REG_INDEX                     (0x10000000UL)
#define USART_CR2_REG_INDEX                     (0x20000000UL)
#define USART_CR3_REG_INDEX                     (0x40000000UL)

#define USART_INDEX_UnMask                      (0x0fffffffUL)

/**
  * @}
  */



/** @defgroup  USART Interrupt Flag with SR Register definition.
  * @{
  */
#define USART_FLAG_CTS                          ((uint32_t)(USART_SR_CTS))                  //This bit can be read and written
#define USART_FLAG_LBD                          ((uint32_t)(USART_SR_LBD))                  //This bit can be read and written
#define USART_FLAG_TXE                          ((uint32_t)(USART_SR_TXE))                  //Write data clear flag bit to DR register
#define USART_FLAG_TC                           ((uint32_t)(USART_SR_TC))                   //Use software to read and write sequences to clear this data
#define USART_FLAG_RXNE                         ((uint32_t)(USART_SR_RXNE))                 //Use software to read sequences to clear this data
#define USART_FLAG_IDLE                         ((uint32_t)(USART_SR_IDLE))                 //Use software to read or write sequences to clear this data
#define USART_FLAG_ORE                          ((uint32_t)(USART_SR_ORE))                  //Use software to read or write sequences to clear this data
#define USART_FLAG_NE                           ((uint32_t)(USART_SR_NE))                   //Use software to read and write sequences to clear this data
#define USART_FLAG_FE                           ((uint32_t)(USART_SR_FE))                   //Use software to read and write sequences to clear this data
#define USART_FLAG_PE                           ((uint32_t)(USART_SR_PE))                   //Use software to read and write sequences to clear this data

/**
  * @}
  */



/** @defgroup  USART Enable or Disable NVIC Interrupt Flag  definition.
  * @{
  */
#define USART_IT_PEIE                           ((uint32_t)(USART_CR1_PEIE))
#define USART_IT_TXEIE                          ((uint32_t)(USART_CR1_TXEIE))
#define USART_IT_TCIE                           ((uint32_t)(USART_CR1_TCIE))
#define USART_IT_RXNEIE                         ((uint32_t)(USART_CR1_RXNEIE))
#define USART_IT_IDLEIE                         ((uint32_t)(USART_CR1_IDLEIE))
#define USART_IT_TE                             ((uint32_t)(USART_CR1_TE))
#define USART_IT_RE                             ((uint32_t)(USART_CR1_RE))

#define USART_IT_LBDIE                          ((uint32_t)(USART_CR2_LBDIE))

#define USART_IT_CTSIE                          ((uint32_t)(USART_CR3_CTSIE))
#define USART_IT_EIE                            ((uint32_t)(USART_CR3_EIE))

/**
  * @}
  */

/** @defgroup  USART LIN Mode Break Detect Length definition.
  * @{
  */
#define USART_LINBREAKDETECTLENGTH_10B          (0x00000000UL)
#define USART_LINBREAKDETECTLENGTH_11B          (USART_CR2_LBDL)

/**
  * @}
  */




/**
  * @brief  USART State Enum definition.
  */
typedef enum
{
    HAL_USART_STATE_RESET           = (uint32_t)0x00000000UL,

    HAL_USART_STATE_READY           = (uint32_t)0x00000001UL,

    HAL_USART_STATE_BUSY            = (uint32_t)0x00000002UL,

    HAL_USART_STATE_BUSY_TX         = (uint32_t)0x00000004UL,

    HAL_USART_STATE_BUSY_RX         = (uint32_t)0x00000008UL,

    HAL_USART_STATE_BUSY_TX_RX      = (uint32_t)0x00000010UL,

    HAL_USART_STATE_TIMEOUT         = (uint32_t)0x00000020UL,

    HAL_USART_STATE_ERROR           = (uint32_t)0x00000040UL,
}HAL_USART_StateTypeDef;

/**
  * @brief  USART Error Code Enum definition.
  */
typedef enum
{
    HAL_USART_ERROR_NONE            = (uint32_t)0x00000000UL,

    HAL_USART_ERROR_CONFIG          = (uint32_t)0x00000001UL,

    HAL_USART_ERROR_PARITY          = (uint32_t)0x00000002UL,

    HAL_USART_ERROR_TIMEOUT         = (uint32_t)0x00000004UL,

    HAL_USART_ERROR_NE              = (uint32_t)0x00000008UL,

    HAL_USART_ERROR_FE              = (uint32_t)0x00000010UL,

    HAL_USART_ERROR_ORE             = (uint32_t)0x00000020UL,

    HAL_USART_ERROR_DMA             = (uint32_t)0x00000040UL,

    HAL_USART_ERROR_CALLBACKS       = (uint32_t)0x00000080UL,
}HAL_USART_ErrorCodeTypeDef;

/**
  * @brief  USART CLKLastBit Enum definition.
  */
typedef enum
{
    USART_LASTBIT_DISABLE           = (uint32_t)0x00000000U,

    USART_LASTBIT_ENABLE            = (uint32_t)(USART_CR2_LBCL),
}HAL_USART_ClockLastBitTypeDef;

/**
  * @brief  USART CLKPhase Enum definition.
  */
typedef enum
{
    USART_PHASE_1EDGE               = (uint32_t)0x00000000U,

    USART_PHASE_2EDGE               = (uint32_t)(USART_CR2_CPHA),
}HAL_USART_ClockPhaseTypeDef;

/**
  * @brief  USART CLKPolarity Enum definition.
  */
typedef enum
{
    USART_POLARITY_LOW              = (uint32_t)0x00000000U,

    USART_POLARITY_HIGH             = (uint32_t)(USART_CR2_CPOL),
}HAL_USART_ClockPolarity;

/**
  * @brief  USART HwFlowCtl Enum definition.
  */
typedef enum
{
    USART_HWCONTROL_NONE            = (uint32_t)0x00000000U,

    USART_HWCONTROL_CTS             = (uint32_t)(USART_CR3_CTSE),

    USART_HWCONTROL_RTS             = (uint32_t)(USART_CR3_RTSE),

    USART_HWCONTROL_CTS_RTS         = (uint32_t)((USART_CR3_CTSE) | (USART_CR3_RTSE)),
}HAL_USART_HardwareFlowControlTypeDef;

/**
  * @brief  USART Mode Enum definition.
  */
typedef enum
{
    USART_MODE_NONE                 = (uint32_t)0x00000000U,

    USART_MODE_TX                   = (uint32_t)(USART_CR1_TE),

    USART_MODE_RX                   = (uint32_t)(USART_CR1_RE),

    USART_MODE_TX_RX                = (uint32_t)((USART_CR1_TE) | (USART_CR1_RE)),
}HAL_USART_ModeTypeDef;

/**
  * @brief  USART Parity Enum definition.
  */
typedef enum
{
    USART_PARITY_NONE               = (uint32_t)0x00000000U,

    USART_PARITY_EVEN               = (uint32_t)(USART_CR1_PCE),

    USART_PARITY_ODD                = (uint32_t)((USART_CR1_PCE) | (USART_CR1_PS)),
}HAL_USART_ParityTypeDef;

/**
  * @brief  USART StopBits Enum definition.
  */
typedef enum
{
    USART_STOPBITS_1                = (uint32_t)0x00000000UL,

    USART_STOPBITS_0_5              = (uint32_t)(0x00001000UL),

    USART_STOPBITS_2                = (uint32_t)(0x00002000UL),

    USART_STOPBITS_1_5              = (uint32_t)(USART_CR2_STOP_Msk),
}HAL_USART_StopBitsTypeDef;

/**
  * @brief  USART WordLength Enum definition.
  */
typedef enum
{
    USART_WORDLENGTH_8B             = (uint32_t)0x00000000U,

    USART_WORDLENGTH_9B             = (uint32_t)(USART_CR1_M),
}HAL_USART_WordLengthTypeDef;

/**
  * @brief  USART WakeUpMethod Enum definition.
  */
typedef enum
{
    USART_WAKEUPMETHOD_IDLELINE     = (uint32_t)0x00000000U,

    USART_WAKEUPMETHOD_ADDRESSMARK  = (uint32_t)(USART_CR1_WAKE),
}HAL_USART_WakeUpMethodTypeDef;

/**
  * @brief  USART Prescaler Enum definition.
  */
typedef enum
{
    USART_PRESCALER_SYSCLK_DIV0     = (uint32_t)0x00000000UL,
    USART_PRESCALER_SYSCLK_DIV2     = (uint32_t)0x00000001UL,
    USART_PRESCALER_SYSCLK_DIV4     = (uint32_t)0x00000002UL,
    USART_PRESCALER_SYSCLK_DIV6     = (uint32_t)0x00000003UL,
    USART_PRESCALER_SYSCLK_DIV8     = (uint32_t)0x00000004UL,
    USART_PRESCALER_SYSCLK_DIV10    = (uint32_t)0x00000005UL,
    USART_PRESCALER_SYSCLK_DIV12    = (uint32_t)0x00000006UL,
    USART_PRESCALER_SYSCLK_DIV14    = (uint32_t)0x00000007UL,
    USART_PRESCALER_SYSCLK_DIV16    = (uint32_t)0x00000008UL,
    USART_PRESCALER_SYSCLK_DIV18    = (uint32_t)0x00000009UL,
    USART_PRESCALER_SYSCLK_DIV20    = (uint32_t)0x0000000AUL,
    USART_PRESCALER_SYSCLK_DIV22    = (uint32_t)0x0000000BUL,
    USART_PRESCALER_SYSCLK_DIV24    = (uint32_t)0x0000000CUL,
    USART_PRESCALER_SYSCLK_DIV26    = (uint32_t)0x0000000DUL,
    USART_PRESCALER_SYSCLK_DIV28    = (uint32_t)0x0000000EUL,
    USART_PRESCALER_SYSCLK_DIV30    = (uint32_t)0x0000000FUL,
    USART_PRESCALER_SYSCLK_DIV32    = (uint32_t)0x00000010UL,
    USART_PRESCALER_SYSCLK_DIV34    = (uint32_t)0x00000011UL,
    USART_PRESCALER_SYSCLK_DIV36    = (uint32_t)0x00000012UL,
    USART_PRESCALER_SYSCLK_DIV38    = (uint32_t)0x00000013UL,
    USART_PRESCALER_SYSCLK_DIV40    = (uint32_t)0x00000014UL,
    USART_PRESCALER_SYSCLK_DIV42    = (uint32_t)0x00000015UL,
    USART_PRESCALER_SYSCLK_DIV44    = (uint32_t)0x00000016UL,
    USART_PRESCALER_SYSCLK_DIV46    = (uint32_t)0x00000017UL,
    USART_PRESCALER_SYSCLK_DIV48    = (uint32_t)0x00000018UL,
    USART_PRESCALER_SYSCLK_DIV50    = (uint32_t)0x00000019UL,
    USART_PRESCALER_SYSCLK_DIV52    = (uint32_t)0x0000001AUL,
    USART_PRESCALER_SYSCLK_DIV54    = (uint32_t)0x0000001BUL,
    USART_PRESCALER_SYSCLK_DIV56    = (uint32_t)0x0000001CUL,
    USART_PRESCALER_SYSCLK_DIV58    = (uint32_t)0x0000001DUL,
    USART_PRESCALER_SYSCLK_DIV60    = (uint32_t)0x0000001EUL,
    USART_PRESCALER_SYSCLK_DIV62    = (uint32_t)0x0000001FUL,
}HAL_USART_PrescalerTypeDef;

/**
  * @brief  USART WorkMode Enum definition.
  */
typedef enum
{
    USART_ASYNCHRONOUS_MODE         = (uint32_t)0x00000000UL,

    USART_SYNCHRONOUS_MODE          = (uint32_t)((USART_CR2_REG_INDEX)|(USART_CR2_CLKEN)),

    USART_HALFDUPLEX_MODE           = (uint32_t)((USART_CR3_REG_INDEX)|(USART_CR3_HDSEL)),

    USART_LIN_MODE                  = (uint32_t)((USART_CR2_REG_INDEX)|(USART_CR2_LINEN)),
}HAL_USART_WorkModeTypeDef;



/**
  * @brief  USART Init Structure definition.
  */
typedef struct
{
    uint32_t                                BaudRate;

    HAL_USART_ClockLastBitTypeDef           CLKLastBit;

    HAL_USART_ClockPhaseTypeDef             CLKPhase;

    HAL_USART_ClockPolarity                 CLKPolarity;

    HAL_USART_HardwareFlowControlTypeDef    HwFlowCtl;

    HAL_USART_ModeTypeDef                   Mode;

    HAL_USART_ParityTypeDef                 Parity;

    HAL_USART_StopBitsTypeDef               StopBits;

    HAL_USART_WordLengthTypeDef             WordLength;

}USART_InitTypeDef;


/**
  * @brief  USART handle Structure definition.
  */
typedef struct
{
    USART_TypeDef                           *Instance;          /*!< USART registers base address                       */

    USART_InitTypeDef                       Init;               /*!< USART communication parameters                     */

    uint8_t                                 *pTxBuffPtr;        /*!< Pointer to USART Tx transfer Buffer                */

    uint16_t                                TxXferSize;         /*!< USART Tx Transfer size                             */

    __IO uint16_t                           TxXferCount;        /*!< USART Tx Transfer Counter                          */

    uint8_t                                 *pRxBuffPtr;        /*!< Pointer to USART Rx transfer Buffer                */

    uint16_t                                RxXferSize;         /*!< USART Rx Transfer size                             */

    __IO uint16_t                           RxXferCount;        /*!< USART Rx Transfer Counter                          */

    HAL_LockTypeDef                         Lock;               /*!< Locking object                                     */

    __IO HAL_USART_StateTypeDef             gState;             /*!< USART state information related to Tx operations   */

    __IO HAL_USART_StateTypeDef             RxState;            /*!< USART state information related to Rx operations   */

    __IO HAL_USART_ErrorCodeTypeDef         ErrorCode;          /*!< USART Error code                                   */

    #if defined(HAL_DMA_MODULE_ENABLED)
    HAL_DMA_Handle_TypeDef                  *pHDma;             /*!< DMA Handle pointer                                 */
    #endif
}USART_HandleTypeDef;



/** @brief  Gets the status of the input interrupt flag bit data.
  * @param  __HANDLE__ specifies the USART Handle.
  * @param  __FLAG__ specifies the flag to check.
  *             This parameter can be one of the following values:
  *             @arg USART_FLAG_PE: Parity error flag.
  *             @arg USART_FLAG_FE: Framing error flag.
  *             @arg USART_FLAG_NE: Noise error flag.
  *             @arg USART_FLAG_ORE: Overrun error flag.
  *             @arg USART_FLAG_IDLE: Idle line detection flag.
  *             @arg USART_FLAG_RXNE: Receive data register not empty flag.
  *             @arg USART_FLAG_TC: Transmission complete flag.
  *             @arg USART_FLAG_TXE: Transmit data register empty flag.
  *             @arg USART_FLAG_LBD: LIN break flag.
  *             @arg USART_FLAG_CTS: CTS state changed flag.
  * @retval  The state of __FLAG__ (RESET or SET)
  */
#define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__)              ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))


/** @brief  Clear the interrupt flag by writing 0 directly to the input bit.
  * @param  __HANDLE__ specifies the USART Handle.
  * @param  __FLAG__ specifies the flag to check.
  *             This parameter can be one of the following values:
  *             @arg USART_FLAG_RXNE: Receive data register not empty flag.
  *             @arg USART_FLAG_TC: Transmission complete flag.
  *             @arg USART_FLAG_LBD: LIN break flag.
  *             @arg USART_FLAG_CTS: CTS state changed flag.
  * @retval None
  */
#define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__)            (((__HANDLE__)->Instance->SR) = (~(__FLAG__)))


/** @brief  Use the software read/write sequence to clear some interrupt flag bits.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_SOFTSEQU_CLEAR_FLAG(__HANDLE__)             do{ __IO uint32_t regtmp = 0U; \
                                                                    regtmp = ((__HANDLE__)->Instance->SR); \
                                                                    regtmp = ((__HANDLE__)->Instance->DR); \
                                                                    UNUSED(regtmp); \
                                                                }while(0U)

/** @brief  Use the software read/write sequence to clear PE interrupt flag bits.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_CLEAR_PEFLAG(__HANDLE__)                    __HAL_USART_SOFTSEQU_CLEAR_FLAG(__HANDLE__)

/** @brief  Use the software read/write sequence to clear FE interrupt flag bits.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_CLEAR_FEFLAG(__HANDLE__)                    __HAL_USART_SOFTSEQU_CLEAR_FLAG(__HANDLE__)

/** @brief  Use the software read/write sequence to clear NE interrupt flag bits.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_CLEAR_NEFLAG(__HANDLE__)                    __HAL_USART_SOFTSEQU_CLEAR_FLAG(__HANDLE__)

/** @brief  Use the software read/write sequence to clear ORE interrupt flag bits.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_CLEAR_OREFLAG(__HANDLE__)                   __HAL_USART_SOFTSEQU_CLEAR_FLAG(__HANDLE__)

/** @brief  Use the software read/write sequence to clear IDLE interrupt flag bits.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__)                  __HAL_USART_SOFTSEQU_CLEAR_FLAG(__HANDLE__)



/** @brief  Disable USART module.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_DISABLE(__HANDLE__)                         CLEAR_BIT(((__HANDLE__)->Instance->CR1), USART_CR1_UE)

/** @brief  Enable USART module.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_ENABLE(__HANDLE__)                          SET_BIT(((__HANDLE__)->Instance->CR1), USART_CR1_UE)

/** @brief  Disable USART LIN mode.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_LIN_DISABLE(__HANDLE__)                     CLEAR_BIT(((__HANDLE__)->Instance->CR2), USART_CR2_LINEN)

/** @brief  Enable USART LIN mode.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_LIN_ENABLE(__HANDLE__)                      SET_BIT(((__HANDLE__)->Instance->CR2), USART_CR2_LINEN)

/** @brief  Disable USART clock ouput.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_SCLK_DISABLE(__HANDLE__)                    CLEAR_BIT(((__HANDLE__)->Instance->CR2), USART_CR2_CLKEN)

/** @brief  Enable USART clock output.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_SCLK_ENABLE(__HANDLE__)                     SET_BIT(((__HANDLE__)->Instance->CR2), USART_CR2_CLKEN)

/** @brief  Diable USART Half-Duplex mode.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_HDSEL_DISABLE(__HANDLE__)                   CLEAR_BIT(((__HANDLE__)->Instance->CR3), USART_CR3_HDSEL)

/** @brief  Enable USART Half-Duplex mode.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_HDSEL_ENABLE(__HANDLE__)                    SET_BIT(((__HANDLE__)->Instance->CR3), USART_CR3_HDSEL)

/** @brief  Diable USART IrDA mode.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_IRDA_DISABLE(__HANDLE__)                    CLEAR_BIT(((__HANDLE__)->Instance->CR3), USART_CR3_IREN)

/** @brief  Enable USART IrDA mode.
  * @param  __HANDLE__ specifies the USART Handle.
  * @retval None
  */
#define __HAL_USART_IRDA_ENABLE(__HANDLE__)                     SET_BIT(((__HANDLE__)->Instance->CR3), USART_CR3_IREN)

/** @brief  This section describes how to enable the USART working mode based on the specified parameters.
  * @param  __HANDLE__ specifies the USART Handle.
  * @param  __MODE__  USART module work mode flag bit data.
  *             @arg USART_SYNCHRONOUS_MODE : USART synchronous mode.
  *             @arg USART_HALFDUPLEX_MODE : USART half-duplex mode.
  *             @arg USART_LIN_MODE : USART LIN mode.
  * @retval None
  */
#define __HAL_USART_ENABLE_MODE(__HANDLE__, __MODE__)           ((((__MODE__) & (USART_CR1_REG_INDEX)) == (USART_CR1_REG_INDEX))? (((__HANDLE__)->Instance->CR1) |= ((__MODE__) & (USART_INDEX_UnMask))): \
                                                                (((__MODE__) & (USART_CR2_REG_INDEX)) == (USART_CR2_REG_INDEX))? (((__HANDLE__)->Instance->CR2) |= ((__MODE__) & (USART_INDEX_UnMask))): \
                                                                (((__MODE__) & (USART_CR3_REG_INDEX)) == (USART_CR3_REG_INDEX))? (((__HANDLE__)->Instance->CR3) |= ((__MODE__) & (USART_INDEX_UnMask))): \
                                                                (0U))

/** @brief  This section describes how to disable the USART working mode based on the specified parameters
  * @param  __HANDLE__ specifies the USART Handle.
  * @param  __MODE__  USART module work mode flag bit data.
  *             @arg USART_SYNCHRONOUS_MODE : USART synchronous mode.
  *             @arg USART_HALFDUPLEX_MODE : USART half-duplex mode.
  *             @arg USART_LIN_MODE : USART LIN mode.
  * @retval None
  */
#define __HAL_USART_DISABLE_MODE(__HANDLE__, __MODE__)          ((((__MODE__) & (USART_CR1_REG_INDEX)) == USART_CR1_REG_INDEX)? (((__HANDLE__)->Instance->CR1) &= (~((__MODE__) & (USART_INDEX_UnMask)))): \
                                                                (((__MODE__) & (USART_CR2_REG_INDEX)) == USART_CR2_REG_INDEX)? (((__HANDLE__)->Instance->CR2) &= (~((__MODE__) & (USART_INDEX_UnMask)))): \
                                                                (((__MODE__) & (USART_CR3_REG_INDEX)) == USART_CR3_REG_INDEX)? (((__HANDLE__)->Instance->CR3) &= (~((__MODE__) & (USART_INDEX_UnMask)))): \
                                                                (0U))


/** @defgroup USART_Private_Macros USART Private Macros
  * @{
  */
#if defined(CONFIG_USE_ZB32L032)
//====================   USART mode: Asynchronous    ==========================//

#define IS_USART_INSTANCE(INSTANCE)                         (((INSTANCE) == USART2) || ((INSTANCE) == USART3))

//==================   USART mode: Hardware Flow control    ===================//

#define IS_USART_HWELOW_INSTANCE(INSTANCE)                  (((INSTANCE) == USART2) || ((INSTANCE) == USART3))

//====================   USART mode: Synchronous    ===========================//

#define IS_USART_ASYNCHRONOUS_INSTANCE(INSTANCE)            (((INSTANCE) == USART2) || ((INSTANCE) == USART3))

//===================   USART mode: Half-Duplex mode    =======================//

#define IS_USART_HALFDUPLEX_INSTANCE(INSTANCE)              (((INSTANCE) == USART2) || ((INSTANCE) == USART3))

//======================   USART mode: LIN mode    ============================//

#define IS_USART_LIN_INSTANCE(INSTANCE)                     (((INSTANCE) == USART2) || ((INSTANCE) == USART3))

#endif

//=======================   USART Init Parameter   ============================//
#define IS_USART_BAUDRATE(BAUDRATE)                         ((BAUDRATE) < 1500000U) // When APB:24MHz

#define IS_USART_HARDWARE_FLOW_CONTROL(HWFLOWCTRL)          (((HWFLOWCTRL) == USART_HWCONTROL_NONE) || ((HWFLOWCTRL) == USART_HWCONTROL_CTS) || \
                                                            ((HWFLOWCTRL) == USART_HWCONTROL_RTS) || ((HWFLOWCTRL) == USART_HWCONTROL_CTS_RTS))

#define IS_USART_MODE(MODE)                                 (((MODE) == USART_MODE_TX) || ((MODE) == USART_MODE_RX) || ((MODE) == USART_MODE_TX_RX))

#define IS_USART_PARITY(PARITY)                             (((PARITY) == USART_PARITY_NONE) || ((PARITY) == USART_PARITY_EVEN) || ((PARITY) == USART_PARITY_ODD))

#define IS_USART_STOPBITS(STOPBITS)                         (((STOPBITS) == USART_STOPBITS_0_5) || ((STOPBITS) == USART_STOPBITS_1) || \
                                                            ((STOPBITS) == USART_STOPBITS_1_5) || ((STOPBITS) == USART_STOPBITS_2))

#define IS_USART_WORDLENGTH(WORDLENGTH)                     (((WORDLENGTH) == USART_WORDLENGTH_8B) || (((WORDLENGTH) == USART_WORDLENGTH_9B)))

#define IS_USART_CLKPOLARITY(CLKPOLARITY)                   ((CLKPOLARITY == USART_POLARITY_HIGH) || (CLKPOLARITY == USART_POLARITY_LOW))

#define IS_USART_CLKPHASE(CLKPHASE)                         ((CLKPHASE == USART_PHASE_1EDGE) || (CLKPHASE == USART_PHASE_2EDGE))

#define IS_USART_CLKLASTBIT(CLKLASTBIT)                     ((CLKLASTBIT == USART_LASTBIT_ENABLE) || (CLKLASTBIT == USART_LASTBIT_DISABLE))

#define IS_USART_LIN_BREAKDETECTLENGTH(BREAKDETECTLENGTH)   ((BREAKDETECTLENGTH == USART_LINBREAKDETECTLENGTH_10B) || (BREAKDETECTLENGTH == USART_LINBREAKDETECTLENGTH_11B))

#define IS_USART_WAKEUPMETHOD(WAKEUPMETHOD)                 ((WAKEUPMETHOD == USART_WAKEUPMETHOD_IDLELINE) || (WAKEUPMETHOD == USART_WAKEUPMETHOD_ADDRESSMARK))




/**
  * @}
  */



/** @addtogroup UART_Exported_Functions
  * @{
  */

/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
  * @{
  */
/* Initialization/de-initialization functions  **********************************/
HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_Asynchronous_Init(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_HalfDuplex_Init(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_LIN_Init(USART_HandleTypeDef *pHUsart, uint32_t BreakDetectLength);
HAL_StatusTypeDef HAL_USART_MultiProcessor_Init(USART_HandleTypeDef *pHUsart, uint8_t Address, uint32_t WakeUpMethod);

void HAL_USART_MspInit(USART_HandleTypeDef *pHUsart);
void HAL_USART_MspDeInit(USART_HandleTypeDef *pHUsart);


/**
  * @}
  */

/** @addtogroup USART_Exported_Functions_Group2
  * @{
  */
/* IO operation functions *******************************************************/
HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *pHUsart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *pHUsart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *pHUsart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);

HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *pHUsart, uint8_t *pTxData, uint16_t Size);
HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *pHUsart, uint8_t *pRxData, uint16_t Size);
HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *pHUsart, uint8_t *pTxData, uint8_t *pRxData,  uint16_t Size);

#if defined(HAL_DMA_MODULE_ENABLED)
HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *pHUsart, uint8_t *pTxData, uint16_t Size);
HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *pHUsart, uint8_t *pRxData, uint16_t Size);
HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *pHUsart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);

HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *pHUsart);
#endif

/* Transfer Abort functions */
HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_AbortTransmit(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_AbortReceive(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_AbortTransmit_IT(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_AbortReceive_IT(USART_HandleTypeDef *pHUsart);

void HAL_USART_IRQHandler(USART_HandleTypeDef *pHUsart);
void HAL_USART_TxCpltCallback(USART_HandleTypeDef *pHUsart);
void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *pHUsart);
void HAL_USART_RxCpltCallback(USART_HandleTypeDef *pHUsart);
void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *pHUsart);
void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *pHUsart);
void HAL_USART_ErrorCallback(USART_HandleTypeDef *pHUsart);
void HAL_USART_CTSCallback(USART_HandleTypeDef *pHUsart);
void HAL_USART_LBDCallback(USART_HandleTypeDef *pHUsart);
void HAL_USART_IDLECallback(USART_HandleTypeDef *pHUsart);
void HAL_USART_AbortCpltCallback(USART_HandleTypeDef *pHUsart);
void HAL_USART_AbortTxCpltCallback(USART_HandleTypeDef *pHUsart);
void HAL_USART_AbortRxCpltCallback(USART_HandleTypeDef *pHUsart);

/**
  * @}
  */

/** @addtogroup USART_Exported_Functions_Group3
  * @{
  */
/* Peripheral Control functions  ************************************************/
HAL_StatusTypeDef HAL_USART_LIN_SendBreak(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_MultiProcessor_EnterMuteMode(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_MultiProcessor_ExitMuteMode(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_HalfDuplex_EnableTransmitter(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_HalfDuplex_EnableReceiver(USART_HandleTypeDef *pHUsart);

/**
  * @}
  */


/** @addtogroup USART_Exported_Functions_Group4
  * @{
  */
/* Peripheral State functions  ************************************************/
HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *pHUsart);
uint32_t               HAL_USART_GetError(USART_HandleTypeDef *pHUsart);
/**
  * @}
  */



/** @addtogroup USART_Exported_Functions_Group5
  * @{
  */
/* Special Mode Transfer function *********************************************/
HAL_StatusTypeDef HAL_USART_Asynchronous_TransmitReceive(USART_HandleTypeDef *pHUsart, uint8_t *pTxData, uint16_t TxSize, uint8_t *pRxData, uint16_t RxSize, uint32_t Timeout);
HAL_StatusTypeDef HAL_USART_Asynchronous_ReceiveTransmit(USART_HandleTypeDef *pHUsart, uint8_t *pTxData, uint16_t TxSize, uint8_t *pRxData, uint16_t RxSize, uint32_t Timeout);
HAL_StatusTypeDef HAL_USART_HalfDuplex_Transmit(USART_HandleTypeDef *pHUsart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_USART_HalfDuplex_Receive(USART_HandleTypeDef *pHUsart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_USART_HalfDuplex_TransmitReceive(USART_HandleTypeDef *pHUsart, uint8_t *pTxData, uint16_t TxSize, uint8_t *pRxData, uint16_t RxSize, uint32_t Timeout);
HAL_StatusTypeDef HAL_USART_HalfDuplex_ReceiveTransmit(USART_HandleTypeDef *pHUsart, uint8_t *pTxData, uint16_t TxSize, uint8_t *pRxData, uint16_t RxSize, uint32_t Timeout);

#if defined(HAL_DMA_MODULE_ENABLED)
HAL_StatusTypeDef HAL_USART_Asynchronous_Transmit_DMAPause(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_Asynchronous_Transmit_DMAResume(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_Asynchronous_Transmit_DMAStop(USART_HandleTypeDef *pHUsart);

HAL_StatusTypeDef HAL_USART_Asynchronous_Receive_DMAPause(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_Asynchronous_Receive_DMAResume(USART_HandleTypeDef *pHUsart);
HAL_StatusTypeDef HAL_USART_Asynchronous_Receive_DMAStop(USART_HandleTypeDef *pHUsart);
#endif

/**
  * @}
  */


/**
  * @}
  */





#ifdef __cplusplus
}
#endif

#endif  /* __ZB32L03x_HAL_USART_H*/
